There is a general drive in the electronics industry to integrate many different types of circuits on a single chip. Among other things, such integrated circuitry can be less expensive, consume less power, and be smaller than corresponding discrete circuits or separate chip devices. There is a related drive to shrink the circuitry as much as possible so that different circuit components are often placed very close together. This can lead to interference between components.
In certain types of communication devices, it is desirable to integrate both precision analog circuitry and a synchronous switching regulator on a single chip. Such an arrangement can be affected by both latchup and switching noise. As discussed in an article entitled Winning the Battle Against Latchup in CMOS Analog Switches by Catherine Redmond, published by Analog Devices Inc. in its technical magazine Analog Dialogue, Volume 35, Number 5, October, 2001, which is hereby incorporated herein by reference in its entirety, latchup may be defined as the creation of a low-impedance path between power supply rails as a result of triggering a parasitic device. Switching noise is the generation of unwanted electrical interference on electrical conductors. Typically, latchup and switching noise is reduced by spatial separation of components, the use of guard rings around components, and/or the use of a deep N-well between components. These types of solutions may not be practical in certain implementations, particularly when trying to minimize chip area with a compact layout and when using a commercial non-epi CMOS process without deep N-well.